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Chamak Ganguly

Designation: Lecturer

I hold a Bachelor’s degree in Electrical and Electronic Engineering from Ahsanullah University of Science and Technology, a field that has captivated me with its diverse subjects and innovative courses. My CGPA is 3.841 out of 4.00.I was ranked 2nd out of 133 students in my batch.It was during the final year of my studies that I discovered my passion for research, particularly in the realm of Low Power VLSI and Analog IC design. This newfound interest propelled me to undertake a thesis project that resulted in the publication of three significant papers. As of right now, I have 8 publications to my name, reflecting my dedication and ongoing contributions to the field.

Ahsanullah University of Science & Technology 2nd Feb, 2024 – Ongoing
M.Sc. in Electrical & Electronic Engineering
Ahsanullah University of Science & Technology 17th Nov, 2017 – 26th June, 2022
B.Sc. in Electrical & Electronic Engineering | CGPA: 3.841/4.00 | Position: 2/133
Saint Joseph Higher Secondary School 2014 – 2016
  Higher Secondary Certificate | GPA: 5.00/5.00
Millennium Scholastic School 2012 – 2014
  Secondary School Certificate | GPA: 5.00/5.00
Lecturer 20th March 2023 – Present
Department of Electrical and Electronic Engineering,
Primeasia University, Star Tower, 12 Kemal Ataturk Ave, Dhaka 1213
Course Title Course Code
Electronics Circuit II EEE-2213/CSE-207
Continuous Signal and Linear System EEE-3119
Power Electronics EEE-4125
VLSI I EEE 4135/CSE 403
  1. Chamak Ganguly, Rahat Redwan, Zarin Saiyara, Mahamudul Hasan, and Md Muin Uddin. “Design and Evaluation of a Low-Power Novel NMOS-Based Adiabatic Circuit.” In 2025 International Conference on Electrical, Computer and Communication Engineering (ECCE), pp. 1-6. IEEE, 2025. Doi:10.1109/ECCE64574.2025.11013789
  2. Mahamudul Hasan, Chamak Ganguly, Farhana Tasnim Aumio, Md Muin Uddin, Shafiul Islam Sadin, and Shahana Akter. “Leveraging FD-SOI Technology for Improved Adiabatic Logic Performance.” In 2024 27th International Conference on Computer and Information Technology (ICCIT), pp. 3511-3516. IEEE, 2024. Doi: 10.1109/ICCIT64611.2024.11021773
  3. Chamak Ganguly, Saeed Hossen Rakib, Farhana Tasnim Aumio, Ariful Islam, SM Kifayat Kabir, Raihan Motalib, Satyendra N Biswas “Design and Analysis of a New Ultra Low Power Adiabatic VLSI Circuit”, Journal of VLSI Design and Signal Processing (e-ISSN: 2581-8449) 9, no. 2 (2023): 1-12.
  4. Chamak Ganguly, Mazeda Zafor Meem, Mohammed Abdullah Faruque, SM Kifayat Kabir, Saeed Hossen Rakib, Khandaker Shams Arefin, “Comparative Analysis of a Proposed Low-Power Adiabatic NOR Gate”, 26th International Conference on Computer and Information Technology (ICCIT), 2023. Doi: 10.1109/ICCIT60459.2023.10441109
  5. SM Kifayat Kabir, Chamak Ganguly, Khandaker Shams Arefin, Nawrin Tamim Adity, Satyendra N Biswas, “Analysis of a 10T Full Adder with a new 4T X-NOR using FD-SOI 22nm Mix-VT Technology”, 26th International Conference on Computer and Information Technology (ICCIT), 2023. Doi: 10.1109/ICCIT60459.2023.10441621
  6. Chamak Ganguly, Mazeda Zafor Meem, SM Kifayat Kabir, Satyendra N Biswas, “Analysis of a Low-Power Full Adder and Half Adder Using a New Adiabatic Logic26th International Conference on Computer and Information Technology (ICCIT), 2023. Doi: 10.1109/ICCIT60459.2023.10441271
  7. Rahat Redwan, Chamak Ganguly, Syed Shouvik Islam, Md Faysal Nayan “Performance Evaluation and Comparative Analysis of Logic Gates based on CNTFET and CMOS26th International Conference on Computer and Information Technology (ICCIT), 2023.Doi: 10.1109/ICCIT60459.2023.10441488
  8. SM Kifayat Kabir, Raihan Motalib, Fakrul Islam Javed, Chamak Ganguly, Saeed Hossen Rakib, Satyendra N Biswas “Performance Analysis of a New Low Power BIST Technique in VLSI Circuit by Reducing the Input Vectors6th International Conference on Electrical Information and Communication Technology (EICT), 2023. Doi: 10.1109/EICT61409.2023.10427977
  9. M. M. Uddin, M. S. Hossain, M. A. Faruque, and C. Ganguly, “Building Integrated Photovoltaic Systems in Bangladesh: Prospects and Challenges,” SciEn Conference Series: Engineering, vol. 3, pp. 318–323, Nov. 2025, Doi: 10.38032/SCSE.2025.3.91

VLSI, Analog Integrated Circuit, Material Science, Neuromorphic Computing

  • Dean’s List of Honor in B.Sc. in EEE
  • 50% Tuition Fee Waiver for top 5% iin the semester from 2nd year to 4th year

Updated On:February 4, 2026